Method for fabricating a contact hole plane in a memory module
US7018781B2 · kind B2 · utility
5Cited by
5References
29Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 29, 2004 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Mar 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/09
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a method for fabricating a contract hole plane in a memory module with an arrangement of memory cells each having a selection transistor. The methods can be utilized during the production of dynamic random access memory (DRAM) modules.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.