Disposable hard mask for memory bitline scaling
US7018868B1 · kind B1 · utility
72Cited by
10References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 2, 2004 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Apr 20, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
Abstract
The invention is a semiconductor device and a method of manufacturing the semiconductor device. The semiconductor device includes buried bitlines in a semiconductor substrate. Additionally, doped regions are formed adjacent the buried bitlines. The doped regions adjacent the buried bitlines inhibit a leakage current between the buried bitlines.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.