Lead frame and semiconductor package with the same
US7019389B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 18, 2004 |
| Grant date | Mar 28, 2006 |
| Priority date | — |
| Expiry date | Apr 14, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A lead frame and a semiconductor package with the lead frame are provided. The lead frame includes a die pad for mounting at least one semiconductor chip thereon; at least one grounding portion protruded from the die pad; and a plurality of leads. The grounding portion has a grounding surface and an opposing bottom surface, wherein the thickness of the grounding portion is smaller than that of the die pad, and a ground pad is formed on the grounding surface for connecting at least one grounding wire to the chip for transmitting ground signals. A plurality of bonding wires are connected from the chip to the leads such that the chip can be electrically connected to an external device via the bonding wires and leads. By the above arrangement, the grounding wire can be prevented from breakage by thermal stress in a high-temperature process, and the production yield is improved.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.