Semiconductor device and method of fabricating the same
US7022624B2 · kind B2 · utility
0Cited by
2References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Dec 18, 2003 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Dec 18, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/31058
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The present invention is provided to a semiconductor device and a method of fabricating the same. A spacer consisting of SiCxHy or SiOCxHy having a low dielectric constant is formed at the sidewall of a trench or a hole that is formed in an interlayer insulating film. It is therefore possible to reduce the dielectric constant while reducing critical dimension loss of the trench or the hole. Therefore, the present invention has advantages that it can enhance the operating speed of the device by minimizing parasitic capacitance and prohibiting RC delay and crosstalk.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.