Non-volatile memory and method with improved sensing
US7023736B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2003 |
| Grant date | Apr 4, 2006 |
| Priority date | — |
| Expiry date | Dec 12, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/065
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for reducing source line bias is accomplished by read/write circuits with features and techniques for multi-pass sensing. When a page of memory cells are being sensed in parallel, each pass helps to identify and shut down the memory cells with conduction current higher than a given demarcation current value. In particular, the identified memory cells are shut down after all sensing in the current pass have been completed. In this way the shutting down operation does not disturb the sensing operation. Sensing in subsequent passes will be less affected by source line bias since the total amount of current flow is significantly reduced by eliminating contributions from the higher current cells. In another aspect of sensing improvement, a reference sense amplifier is employed to control multiple sense amplifiers to reduce their dependence on power supply and environmental variations.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.