Low voltage transient voltage suppressor
US7030447B2 · kind B2 · utility
8Cited by
2References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 15, 2003 |
| Grant date | Apr 18, 2006 |
| Priority date | — |
| Expiry date | May 4, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of providing a Transient Voltage Suppression (TVS) device is described utilizing a Metal Oxide Semiconductor (MOS) structure and an Insulated Gate Bipolar Transistor (IGBT) structure. The MOS based TVS devices offer reduced leakage current with reduced clamp voltages between 0.5 and 5 volts. Trench MOS based TVS device (72) provides an enhanced gain operation, while device (88) provides a top side drain contact. The high gain MOS based TVS devices provide increased control over clamp voltage variation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.