Stack type flip-chip package
US7034388B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2004 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Sep 9, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1815
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A stack type flip-chip package is described, including a substrate board, a first chip, a second chip, a packaging material and a heat sink. The substrate board has bump contacts and line contacts thereon, wherein the bump contacts connect with the bonding pads on the active surface of the first chip via bumps. The back surface of the first chip has a redistribution circuit thereon including bump pads and line pads exposed by a passivation layer, wherein the bump pads connect with the bonding pads of the second chip via bumps, and the line pads are connected to the line contacts via conductive wires. The packaging material encloses the first chip and the conductive wires, but may expose the back surface of the second chip, to which a heat sink can be directly bonded.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.