Method of and system for buffer insertion, layer assignment, and wire sizing using wire codes
US7036104B1 · kind B1 · utility
9Cited by
17References
21Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 6, 1999 |
| Grant date | Apr 25, 2006 |
| Priority date | — |
| Expiry date | Dec 6, 2019 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/396
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of and system for optimizing a tree to meet timing constraints inserts buffers at selected ones of the internal nodes of a tree to form a plurality of subtrees. The method sizes the wires of the subtrees according to a wire code for each subtree, wherein each wire of a subtree has the same wire code. The buffers are inserted and the wires are sized such that slack along the path from a single source node to each sink node of the tree is equal to or greater than zero.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.