Technique for enhancing accuracy of critical dimensions of a gate electrode by using characteristics of an ARC layer
US7041434B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2004 |
| Grant date | May 9, 2006 |
| Priority date | — |
| Expiry date | Mar 30, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG03F7/40
- WIPO fieldOptics
- WIPO sectorInstruments
Abstract
In an improved technique for adjusting an etch time of a resist trim process, additional measurement data representing an optical characteristic, such as the reflectivity of an anti-reflective coating, is used. Since the initial thickness of the resist mask features may significantly depend on the optical characteristics of the anti-reflective coating, the additional measurement data allow compensation for process variations more efficiently as compared to the conventional approach.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.