One-time programmable read only memory and manufacturing method thereof
US7053406B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2005 |
| Grant date | May 30, 2006 |
| Priority date | — |
| Expiry date | Apr 1, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An one-time programmable read only memory is provided. An N-type doping region and a first P-type doping layer are disposed in a P-type semiconductor substrate sequentially. A second P-type doping layer is disposed between the first P-type doping layer and the N-type doping region. The second P-type doping layer with higher doping level, which has a linear structure, is served as a bit line. An electrically conductive layer is disposed over the P-type semiconductor substrate. The electrically conductive layer also has a linear structure that crosses over the first P-type doping layer. The first N-type doping layer is disposed in the P-type semiconductor substrate between the electrically conductive layer and the first P-type doping layer. The arrangement of N-type and P-type doping layer is used to be selective diode device. An anti-fuse layer is disposed between the electrically conductive layer and the first N-type doping layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.