Microelectronic packages with self-aligning features
US7053485B2 · kind B2 · utility
76Cited by
90References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 2003 |
| Grant date | May 30, 2006 |
| Priority date | — |
| Expiry date | Oct 15, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A microelectronic package is made by a process which includes folding a substrate. Alignment elements on different parts of the substrate engage one another during the folding process to position the parts of the substrate precisely relative to one another. One or more of the alignment elements may be a mass of an overmolding encapsulant covering a chip.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.