High mobility heterojunction complementary field effect transistors and methods thereof

US7057216B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Qiqing C. Ouyang · Yorktown Heights, US
• Xiangdong Chen · Irvine, US

Key dates

• Filing date: Oct 31, 2003
• Grant date: Jun 6, 2006
• Expiry date: Oct 31, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/711

Abstract

In all representative embodiments presented, the Ge concentration in the source and drain 10 and the SiGe epitaxial channel layer 20 is in the 15% to 50% range, preferably between about 20% to 40%. The SiGe thicknesses in the source/drain 10 are staying below the critical thickness for the given Ge concentration. The critical thickness is defined such that above it the SiGe will relax and defects and dislocations will form. The thickness of the SiGe epitaxial layer 20 typically is between about 5nm and 15nm. The thickness of the epitaxial Si layer 30 is typically between about 5nm and 15nm. FIG. 1A shows an embodiment where the body is bulk Si. These type of devices are the most common devices in present day microelectronics. FIGS. 1B and 1C show representative embodiment of the heterojunction source/drain FET device when the Si body 40 is disposed on top of an insulating material 55. This type of technology is commonly referred to as silicon on insulator (SOI) technology. The insulator material 55 usually, and preferably, is SiO2. FIG. 1B shows an SOI embodiment where the body 40 has enough volume to contain mobile charges. Such SOI devices are called partially depleted devices. F…