Method of manufacturing non-volatile memory cell
US7060560B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2004 |
| Grant date | Jun 13, 2006 |
| Priority date | — |
| Expiry date | Sep 23, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/691
Abstract
A method of manufacturing a non-volatile memory cell includes forming a first dielectric layer on a substrate. A second dielectric layer having a trench is formed on the first dielectric layer. Thereafter, a pair of charge storage spacers is formed on sidewalls of the trench. A third dielectric layer is then formed over the substrate to cover the first dielectric layer, the charge storage spacers and second dielectric layer. A conductive structure is formed on the third dielectric layer over the charge storage spacers. Subsequently, portions of the third dielectric layer, the second dielectric layer and first dielectric layer not covered by the conductive structure are removed. Ultimately, source/drain regions are formed in the substrate at each side of the conductive structure.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.