Bipolar transistor and method for fabricating it

US7064360B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Martin Franosch · Munich, DE
• Thomas Meister · Taufkirchen, DE
• Herbert Schaefer · Herdorf, DE
• Reinhard Stengl · Stadtbergen, DE

Key dates

• Filing date: Feb 4, 2002
• Grant date: Jun 20, 2006
• Expiry date: Apr 12, 2022

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D10/891

Abstract

A method is provided to fabricate a bipolar transistor with a low base connection resistance, low defect density and improved scalability. Scalability is to be understood in this case as both the lateral scaling of the emitter window and the vertical scaling of the base width (low temperature budget). The temperature budget can be kept low in the base region since no implantations are required in order to reduce the base connection resistance. Furthermore, the difficulties associated with the point defects are largely avoided.