Integrated circuit leadframe with ground plane
US7064420B2 · kind B2 · utility
16Cited by
8References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 23, 2003 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | Dec 27, 2023 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49121
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A leadframe for a semiconductor package includes signal and ground leads, a ground plane, and a frame paddle. Supports connect the signal and ground leads, ground plane, and frame paddle in at least two different layers. At least one force release and stress relief structure is incorporated into the leadframe to free the ground plane substantially from distortion and warpage resulting from residual mechanical stresses therein.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.