Semiconductor die with high density offset-inline bond arrangement
US7064450B1 · kind B1 · utility
24Cited by
11References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 11, 2004 |
| Grant date | Jun 20, 2006 |
| Priority date | — |
| Expiry date | May 11, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A pad pattern of a die includes first and second sets of elongated pads. The first set of elongated pads is interleaved with the second set of elongated pads. Each of the elongated pads has a bond pad area and a probe pad. Each bond pad area has a first constant width along a substantial portion thereof. Similarly, each probe pad area has a second constant width along a substantial portion thereof. The first constant width is greater than the second constant width. Each elongated pad in the first set has a first orientation. Similarly, each elongated pad in the second set has a second orientation, opposite the first orientation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.