Integration of trench power transistors into a 1.5 μm BCD process
US7067879B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2004 |
| Grant date | Jun 27, 2006 |
| Priority date | — |
| Expiry date | May 28, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
Abstract
The formation of vertical trench DMOS devices can be added to existing integrated BCD process flows in order to improve the efficiency of the BCD devices. The formation of this trench DMOS varies from existing approaches used with discrete trench DMOS devices, in that only two extra mask steps are added to the existing BCD process, instead of the 10 or so mask steps used in existing discrete trench DMOS processes. Further, the location of these additional heat cycles in the BCD process steps can be placed so as to have minimal impact on the other components created in the process. Utilizing an integrated trench device in a BCD process can offer at least a factor-of-two RDS(ON) area advantage over a planar counterpart.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.