Internal voltage generating circuit in semiconductor memory device
US7068547B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 2, 2004 |
| Grant date | Jun 27, 2006 |
| Priority date | — |
| Expiry date | Mar 2, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C5/147
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An internal voltage generating circuit in a semiconductor memory device includes a comparing unit for comparing a voltage level of an internal voltage with that of a reference voltage, a pull-up driving unit for performing a pull-up operation for an output terminal in response to an output signal of the comparing unit, and a discharging unit for discharging the output terminal in a period of which the voltage level of the internal voltage is higher than a predetermined target voltage level.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.