Chang-Ho Do
114Patents
9h-index
19Co-inventors
73Inventor score
Filing activity: May 21, 1999 → Sep 12, 2013
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7773439B2 | Test operation of multi-port memory device | Physics | 60 | Active |
| US7266030B2 | Method for measuring offset voltage of sense amplifier and semiconductor employing the method | Physics | 15 | Expired |
| US7586350B2 | Circuit and method for initializing an internal logic unit in a semiconductor memory device | Electricity | 13 | Active |
| US6353570B2 | Row redundancy circuit using a fuse box independent of banks | Physics | 13 | Expired |
| US7522459B2 | Data input circuit of semiconductor memory device | Physics | 11 | Active |
| US6166967A | Multi-bank testing apparatus for a synchronous DRAM | Physics | 10 | Expired |
| US7394712B2 | Semiconductor memory device performing self refresh operation | Physics | 10 | Active |
| US6504769B2 | Semiconductor memory device employing row repair scheme | Electricity | 9 | Expired |
| US7123062B2 | Power-up circuit in semiconductor memory device | Physics | 9 | Expired |
| US8208336B2 | Fuse circuit and semiconductor device having the same | Physics | 9 | Active |
| US8031552B2 | Multi-port memory device with serial input/output interface | Physics | 8 | Active |
| US7616518B2 | Multi-port memory device with serial input/output interface | Physics | 8 | Active |
| US7068547B2 | Internal voltage generating circuit in semiconductor memory device | Physics | 8 | Expired |
| US7916558B2 | Semiconductor memory device and method for reading/writing data thereof | Physics | 7 | Active |
| US7279934B2 | Apparatus for delivering inputted signal data | Electricity | 6 | Expired |
| US7289377B2 | Internal voltage generator capable of regulating an internal voltage of a semiconductor memory device | Physics | 6 | Expired |
| US7123079B2 | High voltage generator in semiconductor memory device | Physics | 6 | Expired |
| US8045394B2 | Word line driving circuit, semiconductor memory device including the same, and method for testing the semiconductor memory device | Physics | 6 | Active |
| US7450448B2 | Semiconductor memory device | Physics | 5 | Active |
| US7804723B2 | Semiconductor memory device with signal aligning circuit | Physics | 5 | Active |
| US7395475B2 | Circuit and method for fuse disposing in a semiconductor memory device | Physics | 5 | Expired |
| US7852129B2 | Power up signal generation circuit and method for generating power up signal | Electricity | 5 | Active |
| USRE40172E1 | Multi-bank testing apparatus for a synchronous dram | General | 5 | Expired |
| US7979758B2 | Semiconductor memory device | Physics | 5 | Active |
| US7499356B2 | Semiconductor memory device | Physics | 5 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.