Method of forming a dual-sided capacitor
US7071056B2 · kind B2 · utility
1Cited by
8References
33Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jul 21, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Sep 23, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/482
Abstract
A dual-sided HSG capacitor and a method of fabrication are disclosed. A thin native oxide layer is formed between a doped polycrystalline layer and a layer of hemispherical grained polysilicon (HSG) as part of a dual-sided lower capacitor electrode. Prior to the dielectric formation, the lower capacitor electrode may be optionally annealed to improve capacitance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.