Method of forming a metal gate structure with tuning of work function by silicon incorporation
US7071086B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 23, 2003 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Oct 2, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/667
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor structure having a metal gate with a controlled work function includes the step of forming a precursor having a substrate with active regions separated by a channel, a temporary gate over the channel and within a dielectric layer. The temporary gate is removed to form a recess with a bottom and sidewalls in the dielectric layer. A non-silicon containing metal layer is deposited in the recess. Silicon is incorporated into the metal layer and a metal is deposited on the metal layer. The incorporation of the silicon is achieved by silane treatments that are performed before, after or both before and after the depositing of the metal layer. The amount of silicon incorporated into the metal layer controls the work function of the metal gate that is formed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.