Semiconductor chip capable of implementing wire bonding over active circuits
US7071575B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 10, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Dec 18, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor chip capable of implementing wire bonding over active circuits (BOAC) is provided. The semiconductor chip includes a bonding pad structure which includes a bondable metal pad, a top interconnection metal layer, a stress-buffering dielectric, and at least a first via plug between the bondable metal pad and the top interconnection metal layer. The semiconductor chip also includes at least an interconnection metal layer, at least a second via plug between the interconnection metal layer and the bonding pad structure, and an active circuit situated underneath the bonding pad structure on a semiconductor bottom.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.