Wafer probecard interface
US7071724B2 · kind B2 · utility
0Cited by
4References
18Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jun 25, 2004 |
| Grant date | Jul 4, 2006 |
| Priority date | — |
| Expiry date | Jun 25, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2029/5602
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Apparatus and method for testing a device wafer having a plurality of devices formed thereon. One embodiment of the invention provides an interface wafer comprising a plurality of contact pads disposed on a first surface for contacting a plurality of device pads on the device wafer and a plurality of interface pads disposed on a second surface for contacting probe needles on a probe card, wherein the plurality of interface pads are electrically connected to the plurality of contact pads and wherein the plurality of interface pads are disposed in a relaxed-pitch arrangement as compared to the plurality of contact pads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.