Patent · US Expired

Method for fabricating trench capacitors for large scale integrated semiconductor memories

US7074317B2 · kind B2 · utility

0Cited by

6References

24Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Albert Birner · Regensburg, DE
Dirk Schumann · Lübbenau/Spreewald - Lubnjow/Błota, DE
Matthias Goldbach · Dresden, DE

Key dates

Filing date	May 12, 2003
Grant date	Jul 11, 2006
Priority date	—
Expiry date	Apr 4, 2024

Classification

Technology area (CPC H)Electricity
CPC primaryH10D1/68
WIPO fieldSurface technology, coating
WIPO sectorChemistry

Abstract

An electrochemical method is provided for producing trenches for trench capacitors in p-doped silicon with a very high diameter/depth aspect ratio for large scale integrated semiconductor memories. Trenches (macropores) having a diameter of less than about 100 nm and a depth of more than 10 μm can be produced on p-doped silicon having a very low resistivity at a high etching rate.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.