Gate electrode forming methods using conductive hard mask
US7084024B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 29, 2004 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Sep 29, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/693
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods related to formation of a gate electrode are disclosed that employ a conductive hard mask as a protective layer during a photoresist removal process. In preferred embodiments, the conductive hard mask includes a metal containing conductor or a metal silicide. The invention prevents process damage on the gate dielectric during wet and/or dry resist strip, and since the conductive hard mask cannot be etched in typical resist strip chemistries, the invention also protects a metal electrode under the hard mask. The steps disclosed allow creation of a multiple work function metal gate electrode, or a mixed metal and polysilicon gate electrode, which do not suffer from the problems of the related art.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.