Method for producing an integrated circuit

US7084027B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• Andreas Hilliger · Yokohama, JP
• Ralf Staub · Dresden, DE
• Eike Lüken · Holzkirchen, DE

Key dates

• Filing date: Sep 18, 2001
• Grant date: Aug 1, 2006
• Expiry date: Nov 28, 2021

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76897
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

The invention relates to a method for producing an integrated circuit comprising the following steps: preparing a semi-conductor substrate (1) with a contacting circuit area (SS); providing an insulating layer (IS) on the surface of the semi-conductor substrate (1): providing a contact hole (KL) in the insulating layer (IS) for making contacting the circuit area (SS); providing an insulating spacer area (10′) in at least the area above the contact hole (KL); providing at least three trenches (BG1; BG2; BG3), the first (BG1) of which is arranged next to the contact hole (KL), a second (BG2) is disposed across the contact hole (KL) and a third (BG3) is next to the contact hole (KL). The spacer area (10′) is placed between the first and the second trench (BG1; BG2) and the second and the third trench (BG2; BG3); filling the trenches (BG1; BG2; BG3) with a conductive material; and chemical-mechanical polishing of conductive material for producing three separated trenches (BL1; BL2; BL3).