Fast dynamic low-voltage current mirror with compensated error
US7084699B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 7, 2005 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Apr 7, 2025 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG05F3/262
- WIPO fieldControl
- WIPO sectorInstruments
Abstract
A current mirror comprising: a first current source; a first n-channel MOS transistor having a drain and a gate coupled to said current source and a source coupled to ground; a second n-channel MOS transistor having a drain, a gate coupled to said drain and said gate of said first n-channel MOS transistor, and a source coupled to ground; a third n-channel MOS transistor having a source coupled to said drain of said second n-channel MOS transistor, a gate, and a drain comprising an output-current node; a second current source; a p-channel MOS transistor having a drain coupled to ground, a source coupled to said second current source and said gate of said third n-channel MOS transistor, and a gate coupled to said drain and said gate of said first n-channel MOS transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.