Memory management for a symmetric multiprocessor computer system
US7085897B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 12, 2003 |
| Grant date | Aug 1, 2006 |
| Priority date | — |
| Expiry date | Sep 28, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0822
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A modular multiprocessor computer system having a plurality of nodes each being in communication with each other via communication links. The plurality of nodes each have local memory and local cache accessible by the other nodes. The plurality of nodes each also having a cache directory, one or more processing units, and a memory coherent directory to keep track of the scope of ownership of data within the modular multiprocessing computer system. The local memory and the local cache contain configurable regions of storage, wherein memory coherency traffic on the communication links between the nodes is controlled through the use of the memory coherent directory during a data request.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.