Magnetoelectronic devices utilizing protective capping layers and methods of fabricating the same
US7087972B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jan 31, 2005 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Jan 31, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B61/22
Abstract
Magnetoelectronic device structures and methods for fabricating the same are provided. One method comprises forming a first and a second conductor. The first conductor is electrically coupled to an interconnect stack. A first insulating layer is deposited overlying the first conductor and the second conductor. A via is etched to substantially expose the first conductor. A protective capping layer is deposited by electroless deposition within the via and is electrically coupled to the first conductor. A magnetic memory element layer is formed within the via and overlying the second insulating layer and the second conductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.