Method and apparatus for operating a transceiver in different data rates
US7088767B1 · kind B1 · utility
Assignee
Inventor
Key dates
| Filing date | Mar 1, 2002 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Aug 3, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/385
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A transceiver can be used to send and receive data at a lower data rate than the data rate its SERDES is designed to operate. It contains a transmitter interface that receives a first set of data at a lower data rate and delivers a second set of data to the SERDES at a higher data rate. The transceiver also contains a receiver interface that receives a third set of data from the SERDES at the higher data rate and delivers a fourth set of data at the lower data rate. To reduce the minimum transmission serial data rate, one embodiment of the present invention derives a half-speed clock for the transmitter interface. Using the half-speed clock, the transmitter interface supplies data to be transmitted at half the normal rate with respect to a reference clock. As a result, the data rate is reduced. The opposite operation is used for the receiver interface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.