Method and system for providing quality control on wafers running on a manufacturing line
US7089132B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 2004 |
| Grant date | Aug 8, 2006 |
| Priority date | — |
| Expiry date | Aug 21, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/14
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A method for providing quality control on wafers running on a manufacturing line is disclosed. The resistances on a group of manufacturing test structures within a wafer running on a wafer manufacturing line are initially measured. Then, an actual distribution value is obtained based on the result of the measured resistances on the group of manufacturing test structures. The difference between the actual distribution value and a predetermined distribution value is recorded. Next, the resistances on a group of design test structures within the wafer are measured. The measured resistances of the group of design test structures are correlated to the measured resistances of the group of manufacturing test structures in order to obtain an offset value. The resistance of an adjustable resistor circuit within the wafer and subsequent wafers running on the wafer manufacturing line are adjusted according to the offset value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.