Fabrication of flat-panel display having spacer with rough face for inhibiting secondary electron escape

US7090554B1 · kind B1 · utility

Assignees

• Candescent Technologies Corporation · US
• Candescent Intellectual Property Services, Inc. · US
• ADVANCED TECHNOLOGY & MATERIALS CO., LTD. · US

Inventors

• Roger W. Barton · Santa Clara, US
• Kollengode S. Narayanan · Cupertino, US
• Bob Lee Mackey · San Jose, US
• John M. Macaulay · Palo Alto, US
• George B. Hopple · Palo Alto, US
• Donald R. Schropp, Jr. · Sunnyvale, US
• Michael J. Nystrom · San Jose, US
• Sudhakar Gopalakrishnan · San Jose, US
• Shiyou Pei · Naperville, US
• Xueping Xu · Vernon, US

Key dates

• Filing date: Jun 24, 2003
• Grant date: Aug 15, 2006
• Expiry date: Jul 8, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01J2329/866
• WIPO field: Electrical machinery, apparatus, energy
• WIPO sector: Electrical engineering

Abstract

A flat-panel display is fabricated by a process in which a spacer (24) having a rough face (54 or 56) is positioned between a pair of plate structure (20 and 22). When electrons strike the spacer, the roughness in the spacer's face causes the number of secondary electrons that escape the spacer to be reduced, thereby alleviating positive charge buildup on the spacer. As a result, the image produced by the display is improved. The spacer facial roughness can be achieved in various ways such as providing suitable depressions (60, 62, 64, 66, 70, 74, or 80) or/and protuberances (82, 84, 88, and 92) along the spacer's face.