Ultra thin body fully-depleted SOI MOSFETs
US7091069B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2004 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Aug 5, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/017
Abstract
A method of creating ultra tin body fully-depleted SOI MOSFETs in which the SOI thickness changes with gate-length variations thereby minimizing the threshold voltage variations that are typically caused by SOI thickness and gate-length variations is provided. The method of present invention uses a replacement gate process in which nitrogen is implanted to selectively retard oxidation during formation of a recessed channel. A self-limited chemical oxide removal (COR) processing step can be used to improve the control in the recessed channel step. If the channel is doped, the inventive method is designed such that the thickness of the SOI layer is increased with shorter channel length. If the channel is undoped or counter-doped, the inventive method is designed such that the thickness of the SOI layer is decreased with shorter channel length.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.