Dual gate FinFet

US7091566B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Huilong Zhu · Poughkeepsie, US
• Jochen Beintner · Wappingers Falls, US
• Bruce B. Doris · Brewster, US
• Ying Zhang · Santa Clara, US

Key dates

• Filing date: Nov 20, 2003
• Grant date: Aug 15, 2006
• Expiry date: Apr 3, 2024

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/6217

Abstract

A field effect transistor (FET), integrated circuit (IC) chip including the FETs and a method of forming the FETS. Each FET includes a device gate along one side of a semiconductor (e.g., silicon) fin and a back bias gate along an opposite of the fin. Back bias gate dielectric differs from the device gate dielectric either in its material and/or thickness. Device thresholds can be adjusted by adjusting back bias gate voltage.