Dynamic memory and method for testing a dynamic memory
US7092303B2 · kind B2 · utility
1Cited by
11References
13Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | May 13, 2002 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | May 13, 2022 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
The invention relates to a dynamic memory having a memory cell array, a test controller to test the memory cell array and an oscillator to control the refreshing of the memory cell array. According to the invention, the memory includes a device for using the oscillator as a time base for the test controller, such that a slow time base is achieved which may be used for different self-tests of the memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.