Semiconductor memory
US7092304B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Sep 2, 2004 |
| Grant date | Aug 15, 2006 |
| Priority date | — |
| Expiry date | Sep 15, 2024 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/22
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A dummy capacitor drive potential VDC is given to one electrode of a dummy capacitor, and a reference potential for determining a data value of a memory cell is generated in the other electrode thereof. A potential generator circuit for generating the potential VDC is composed of a BGR circuit outputting a potential VBGRTEMP having temperature dependency, and resistors R3 and R4, which are series-connected between an output terminal of the BGR circuit and a ground point. The potential VDC is output from a connection point of the resistors R3 and R4. Temperature dependency of the potential VDC is adjusted based on a resistance ratio of resistors R1-1, R1-2 and R2, and the absolute value is adjusted based on a resistance ratio of resistors R3 and R4.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.