Method for forming self-aligned contact in semiconductor device
US7094672B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 15, 2004 |
| Grant date | Aug 22, 2006 |
| Priority date | — |
| Expiry date | Sep 15, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76885
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a self-aligned contact on a semiconductor substrate provided with a plurality of field-effect transistors. The method includes the steps of forming a first insulating layer that includes a nitride along a profile of a gate structure and a junction region, forming a temporary layer that has a doped oxide on the first insulting layer, removing a portion of the temporary layer by performing a selective etch of the oxide with a mask while leaving a plug portion of the temporary layer over the junction region, forming a second insulting layer that has an undoped oxide in a region where the portion of the temporary layer is removed, removing the plug portion by performing a selective etch of the undoped oxide to form a contact hole, removing a portion of the first insulating layer at a bottom of the contact hole, and forming a conductive contact ins the contact hole.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.