Measuring flare in semiconductor lithography

US7096127B2 · kind B2 · utility

Assignee

• Infineon Technologies AG · DE

Inventors

• David Ziger · San Antonio, US
• Ralf Ziebold · Radebeul, DE
• Frank E. Goodwin · Chapel Hill, US

Key dates

• Filing date: Oct 13, 2004
• Grant date: Aug 22, 2006
• Expiry date: Oct 13, 2024

Classification

• Technology area (CPC G): Physics
• CPC primary: G03F7/70941
• WIPO field: Optics
• WIPO sector: Instruments

Abstract

Systems, methods, and lithography masks for measuring flare in semiconductor lithography. A layer of photosensitive material is exposed to a first test pattern and a second test pattern, the second test pattern comprising an opaque or attenuated region. The second test pattern is placed proximate features formed in a photosensitive material in a first exposure by the first test pattern, in a second exposure by the second test pattern on the same mask or a different mask. Alternatively, the second test pattern may be disposed proximate a portion of the first test pattern on a single mask using a single exposure. If flare exists in the optical system, the second test pattern causes line shortening in the features formed in the photosensitive material of the first test pattern. The line shortening can be measured to determine the effect of flare in the lithography system.