Use of silicon containing gas for CD and profile feature enhancements of gate and shallow trench structures
US7098141B1 · kind B1 · utility
3Cited by
45References
31Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 3, 2003 |
| Grant date | Aug 29, 2006 |
| Priority date | — |
| Expiry date | Jun 11, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor manufacturing process provides a shallow trench in a silicon layer using a silicon containing etch gas to provide controlled top and/or bottom rounding of the trench or to enhance profile control and/or critical dimension control by controlled deposition across a semiconductor substrate. A gate structure can be etched on a semiconductor substrate using a silicon containing gas to enhance profile control and/or critical dimension control.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.