Semiconductor device and a method of manufacturing the same
US7102223B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | Aug 5, 2003 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Sep 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/00
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device includes plural electrode pads arranged in an active region of a semiconductor chip, and wiring layers provided below the plural electrode pads wherein occupation rates of wirings arranged within the regions of the electrode pads are, respectively, made uniform for every wiring layer. To this end, in a region where an occupation rate of wiring is smaller than those in other regions, a dummy wiring is provided. On the contrary, when the occupation rate of wiring is larger than in other regions, slits are formed in the wiring to control the wiring occupation rate. In the respective wirings layers, the shapes, sizes and intervals of wirings below the respective electrode pads are made similar or equal to one another.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.