Chip carrier for semiconductor chip
US7102239B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 30, 2004 |
| Grant date | Sep 5, 2006 |
| Priority date | — |
| Expiry date | Mar 3, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A chip carrier for a semiconductor chip is provided. A plurality of solder pads for bump soldering are formed on a chip mounting surface of the chip carrier, to allow a flip chip to be mounted and electrically connected to the chip carrier. A solder mask layer is formed on the chip carrier, wherein a plurality of openings are provided in the solder mask layer to expose the solder pads, and an outwardly opening extended portion is formed respectively from the openings corresponding to the solder pads having a relatively narrower pitch therebetween, so as to prevent formation of voids during an underfill process for filing a gap between the flip chip and the chip carrier.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.