Capping layer for reducing amorphous carbon contamination of photoresist in semiconductor device manufacture; and process for making same
US7109101B1 · kind B1 · utility
Assignees
Inventors
Key dates
| Filing date | May 6, 2003 |
| Grant date | Sep 19, 2006 |
| Priority date | — |
| Expiry date | Aug 23, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In the fabrication of semiconductor devices using the PECVD process to deposit hardmask material such as amorphous carbon, structure and process are described for reducing migration of species from the amorphous carbon which can damage an overlying photoresist. In one embodiment useful to 248 nm and 193 nm photolithography exposure wavelengths, amorphous carbon is plasma-deposited on a substrate to pre-defined thickness and pre-defined optical properties. A SiON layer is combined with a silicon-rich oxide layer, a silicon-rich nitride layer or a TEOS layer to create a capping layer resistant to species-migration. Layers are formulated to pre-determined thicknesses, refractive indices and extinction coefficients. The capping stacks constitute an effective etch mask for the amorphous carbon; and the hardmask properties of the amorphous carbon are not compromised. The disclosure has immediate application to fabricating polysilicon gates.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.