Non-volatile memory device with a polarizable layer
US7112850B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 5, 2003 |
| Grant date | Sep 26, 2006 |
| Priority date | — |
| Expiry date | Mar 5, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/7624
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
This invention concerns a non-volatile memory device with a polarizable layer. The apparatus concerns a substrate, a buried oxide layer within the substrate, and a polarizable layer within the substrate. The polarizable layer is formed in a buried oxide layer of a silicon-on-insulator substrate for the fabrication of non-volatile memory. The process of creating the polarizable layer comprises implanting, through the active silicon layer, Si ions into the buried oxide layer at an ion implantation energy selected so that the implanted ion has its peak concentration between 5–50 nm from the silicon/buried oxide interface. The implantation step can occur while externally heating the silicon-on-insulator substrate at a temperature between 25–300 degrees Celsius. An annealing step may be completed to repair any damage the implantation may have created in the silicon-on-insulator substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.