Top surface roughness reduction of high-k dielectric materials using plasma based processes
US7115530B2 · kind B2 · utility
34Cited by
1References
24Claims
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Key dates
| Filing date | Dec 3, 2003 |
| Grant date | Oct 3, 2006 |
| Priority date | — |
| Expiry date | Dec 3, 2023 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/022
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A system and method for manufacturing semiconductor devices with dielectric layers having a dielectric constant greater than silicon dioxide includes depositing a dielectric layer on a substrate and subjecting the dielectric layer to a plasma to reduce top surface roughness in the dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.