Low triggering voltage ESD protection structure and method for reducing the triggering voltage

US7115951B1 · kind B1 · utility

Assignee

• NATIONAL SEMICONDUCTOR CORPORATION · US

Inventors

• Vladislav Vashchenko · Palo Alto, US
• Ann Concannon · San Jose, US
• Peter J. Hopper · San Jose, US
• Marcel ter Beek · Pleasanton, US
• Yuri Mirgorodsky · Sunnyvale, US

Key dates

• Filing date: Sep 4, 2002
• Grant date: Oct 3, 2006
• Expiry date: Apr 5, 2023

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D30/60

Abstract

In a triggering ESD protection structure, the triggering voltage is reduced by introducing one or more corners or spikes into the p-n breakdown junction. This may be done by providing a polygate with a zig-zag pattern to define triangular corners in the drain or anode of the structure.