Method and device for data transfer
US7120818B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 22, 2002 |
| Grant date | Oct 10, 2006 |
| Priority date | — |
| Expiry date | Sep 4, 2023 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C7/1084
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Data transfer is effected on an internal and/or on an external transfer path with or in a semiconductor component, such as a semiconductor memory. A first multiplexer/demultiplexer codes a data sequence by defining a current level and a voltage level for a data signal. The coded sequence is then transferred on the transfer path synchronously with a clock signal and is decoded in a second multiplexer/demultiplexer by evaluation of the received current level and of the received voltage level. From this, the transferred data sequence is determined.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.