Patent · US Expired

Semiconductor device and production process

US7122899B2 · kind B2 · utility

3Cited by

9References

38Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Bernhard Lippmann · Landshut, DE
Stefan Wallstab · Birkenfeld, DE
Günter Schmid · Hemhofen, DE
Rainer Leuschner · Regensburg, DE

Key dates

Filing date	Apr 26, 2002
Grant date	Oct 17, 2006
Priority date	—
Expiry date	May 30, 2022

Classification

Technology area (CPC H)Electricity
CPC primaryH10D1/47
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

An ohmic resistance is present between two parts of a conductor layer so that the size of the ohmic resistance can be ascertained and/or a semiconductor region is present in or on a layer forming the dielectric. The conductor layer is structured into a gate contact, a source contact, and a drain contact so that a transistor function or switching function is possible in the semiconductor region. Such a configuration allows an attempt to analyze the circuit integrated in the chip to be detected.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.