Capacitor including a dielectric layer having an inhomogeneous crystalline region and method of fabricating the same
US7125767B2 · kind B2 · utility
8Cited by
3References
19Claims
0Family size
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Key dates
| Filing date | Dec 8, 2005 |
| Grant date | Oct 24, 2006 |
| Priority date | — |
| Expiry date | Dec 8, 2025 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D1/694
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a capacitor, and a method of fabricating the same, the capacitor includes a lower electrode, a dielectric layer on the lower electrode, and an upper electrode on the dielectric layer, wherein the dielectric layer includes a lower dielectric region contacting the lower electrode, an upper dielectric region contacting the upper electrode, and at least one middle dielectric region between the lower dielectric region and the upper dielectric region, the at least one middle dielectric region having a less crystalline region than both the lower dielectric region and the upper dielectric region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.