Method of fabricating a semiconductor device comprising a gate dielectric made of high dielectric permittivity material
US7129563B2 · kind B2 · utility
4Cited by
8References
7Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 1, 2004 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | Oct 9, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/68
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A process and a device for fabricating a semiconductor device having a gate dielectric made of high-k material, includes a step of depositing, directly on the gate dielectric, a first layer of Si1−xGex, where 0.5<x≦1, at a temperature substantially below the temperature at which a poly-Si is deposited by thermal chemical vapor deposition (CVD).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.