Scribe street structure for backend interconnect semiconductor wafer integration
US7129566B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 30, 2004 |
| Grant date | Oct 31, 2006 |
| Priority date | — |
| Expiry date | Jun 30, 2024 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of making a semiconductor device includes forming a wafer having a substrate and an interconnect structure over the substrate. The wafer also includes a plurality of die areas and a street located between a first die area of the plurality and a second die area of the plurality. A separation structure that includes metal is located in the interconnect structure. At least a portion of the separation structure is located in a saw kerf of the street. The separation structure is arranged to provide a predefined separation path for separating the first die area during a singulation process.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.